Simply put, the instruction set is the voice that the CPU can understand, which can be called machine language.
The CPU instruction set mainly includes CISC (Complex Instruction Set) and RISC (Reduced Instruction Set).
The image says,
CISC is similar to Chinese, and each sentence is composed of Chinese characters, and each Chinese character is equivalent to an instruction set;
RISC is similar to English. Every sentence is composed of letters, and each letter is equivalent to a set of instructions. (There is no discussion of what Chinese characters are composed of strokes, the metaphor of the image.)
But both Chinese and English can achieve basic human communication.
For example, although English has only 26 letters, there are thousands of Chinese characters. But sometimes translations express the same meaning and are often more complicated than Chinese. For example, Chinese verses, simple Chinese characters, can describe the mood at this moment.
The instruction set is the instruction that the CPU can read. The command is the machine language that the pre-defined people can control and understand how the cpu works.
Knowing what is the instruction set, there is another concept at this time to compile.
Compiling is actually programming a high-level language machine language. That is the binary thing. When burning openwrt, open it with the hex editor, which is all binary code, these are the translated machine language. (Of course, after processing the instruction set in the firmware, there is still data, the data is an ordinary resource file, and will not control the cpu).
The MIPS instruction set is the language that the MIPS architecture CPU can read.
MIPS instruction set is a reduced instruction set
All MIPS instructions are 32-bit, the instruction format is simple, and the X86 instruction length is not fixed.
Simple instructions and formats are easy to decode and pipeline, but the code density is not high, resulting in large binary files
MIPS has 32 general-purpose registers REG. Why are 32 instead of more?
Because more registers require more instruction space to encode registers, it also increases the burden of context switching.
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