What are the unavoidable problems in FPGA debugging

This is an important step in hardware design during FPGA debugging. This article discusses three common misunderstandings during FPGA debugging:

Misunderstanding #1: The debugging work exists because the engineer is not competent enough.

Misunderstanding #2: A single approach should solve all debugging issues.

Misunderstanding #3: FPGA debugging hardware always "wastes" resources.

First of all, for misunderstanding #1, debugging is part of the design process

It can be very responsible: even the best engineers need to carry out debugging and verification work.

If the word "Debugging" makes you feel bored, we can change the term "functional verification", "functional testing", performance testing, etc.. Although engineers can improve technology, implementation methods, and rely on their own experience And ability to solve most of the problems in the verification process. But it still can’t replace the core position of verification design in engineering design. Debugging in engineering design often brings a certain degree of complexity, which makes debugging work an electronic system An extremely complex task process in the design.

Secondly, for misunderstanding #2, a single method cannot solve all debugging problems

Debugging involves a variety of technologies and tools, and the key task of an engineer is to choose the right technology to achieve the goal more effectively.

Engineers often complain that hardware verification cannot provide a simulation-like visualization. But I believe the key to this problem is that the traditional embedded LA (ILA) is limited by the size of the storage capacity and cannot visualize enough debugging information. If appropriate debugging tools are used, ideal visualization effects can be achieved. As shown in the figure below, Exostiv can realize large-capacity debugging data tracking and realize ideal visual debugging.

Up to 8GB of external memory, which provides a total tracking capacity 100.000 times larger than existing embedded instrument solutions

EXOSTIV captures 8GB of data in bursts over 1 hour

Finally, in response to Misunderstanding #3, debugging cannot be done "out of thin air", and reasonable debugging work is "waste" and save resources. How to choose a debugging plan is the key to "waste" or not

In addition to analyzing from a project perspective, debugging work also requires "engineering resources"-usually the time the engineering team spends to find errors in the selected debugging strategy.

To sum up, all of the above will cause additional costs to our project budget.

Additional hardware cost for debugging on the PCB;

The cost of a logic analyzer or oscilloscope;

The engineering hour cost of implementing a specific commissioning strategy.

How to balance the cost (hardware resources and engineering resources) has become the most important thing in choosing a debugging solution.

For FPGA engineers who are troubled by debugging, a new debugging solution is here! ! ! FPGA debugging tool-EXOSTIV

EXOSTIVâ„¢ is an innovative debugging solution for FPGA development. He provides a sampling data storage depth far exceeding JTAG debugging tools, but only uses far fewer IO resources than logic analyzers. It has little impact on the use of FPGA logic resources, and can analyze terabytes of waveform data, which can greatly shorten the debugging cycle of FPGA development. EXOSTIV supports the full range of Xilinx All Programmable devices, and supports the debugging of Intel Stratix 10, Arria 10, and Cyclone 10 series devices.

EXOSTIV has the following features:

The FPGA-based serial transceiver puts the captured data stream into an external memory and provides up to 8GB of storage space

Supports continuous and repeated capture of up to 32768 internal signals, and can capture data at the same time at FPGA operating speed

Exostiv IP provides a dynamic multiplexing controller that can add as many captured signals as possible to reduce the number of recompiling FPGAs

Using MYRIAD waveform analysis software, it is the industry's first fast analysis tool that supports TB-level digital/analog waveform data

Dynamic switch control of data set sampling to make full use of the transceiver bandwidth for deeper capture

Up to 4x12.5Gbps data transmission bandwidth, support to connect to FPGA board through SFP/SFP+/QSFP/QSFP+/HDMI/FMC interface

Exostiv's main business:

Exostiv Labs is a department of Byte Paradigm sprl, which mainly provides innovative solutions for FPGA debugging.

Service by Element Technology

E-Element Technology is the official Xilinx authorized training partner. In addition to providing you with Exostiv's high-performance FPGA debugging tools and technical support locally, we also have the latest official Xilinx training course services worldwide for you to choose from, which can provide you with your project All-round support shortens your project development cycle.