Mobile consumer devices such as smartphones, tablets and ultrabooks are facing growing demands for a rich, diverse and instant online multimedia experience. In the system design, from the screen and peripherals (such as radio, camera and data interface) to the application processor, almost every part changes. These changes have had a major impact on the implementation of power management functions. In addition to managing the power of the entire system, it is also necessary to increase the efficiency of the power supply to achieve longer battery life.
For example, today's most popular mobile devices come with multiple cameras, including front and rear cameras, and some also support 3D photography and video, in some cases up to 41 million pixels. At present, in order to achieve a better visual experience, large screen sizes are becoming more and more popular, accompanied by the use of capacitive multi-touch functions, and in some of the most advanced models tend to be equipped with 3D-enabled screens.
In terms of wireless connectivity, in addition to GSM, Bluetooth, Wi-Fi and GPS, new applications for mobile payment using Near Field Communication (NFC) technology have added more radio frequency (RF) connections. Today's tablet and smartphone users are also looking for high-quality calls that are louder and higher quality speaker performance, high-quality microphones, and high-definition audio playback. In addition, the popularity of applications such as social networking and mobile web browsing means that users are constantly getting more data bandwidth through 3G and 4G LTE.
Into the internal systems that users have never seen before, the application processor has evolved from a single core to a dual core in just one or two years, even to the current quad-core configuration, in order to handle increasingly diverse and high-performance Features. Some of the latest multi-core application processor families also integrate additional peripherals such as DRAM controllers and media/image coprocessors such as ARM Neon.
The ever-increasing number of peripherals and processor cores found in today's mobile processor platforms is driving the need for increasingly complex power management functions. Power management must also be able to handle more complex charging scenarios, at least for the most likely charging methods that today's users can charge their devices, such as computer USB ports, car chargers, and conventional AC power chargers.
Multicore processor impact
Figure 1 illustrates the subsystems for power management in various smartphones. In order to power these subsystems, the power management IC must have enough buck or boost converters and low dropout linear regulators (LDOs), as well as power-up and power-down sequencing, high-accuracy power consumption, etc. Demand, providing users with the estimated remaining battery life. Power-up and power-down control are especially important for application processors because timing requirements are critical in multi-core architectures. Intelligent power management also needs to handle an increasing number of sensors to support functions such as backlight dimming, camera gesture recognition, navigation, and proximity detection.
Figure 1: More and more complex power management features in today's mobile devices.
When a processor architecture transitions from a single core to a dual-core architecture, power management designs tend to use the same power domain to power both cores simultaneously. With the advent of quad-core processors, each processor core is independently powered by a single regulator's power domain, giving system designers more flexibility to control the power supply of each core. Each core in the processor can be individually turned off, and each regulator can be reasonably reduced to a smaller current that meets the worst-case requirements.
Go to integrated power management
The low-nanometer process technology of multi-core application processors is having a profound impact on the implementation of power management. In earlier platforms such as 2G phones, baseband, application processors, and power management chips (PMICs) were typically integrated into the same chip. This has become no longer possible when the application processor is manufactured using a lower nanotechnology process, as shrinking the process size requires a lower operating voltage. In chips using CMOS technology, smaller device sizes reduce the maximum voltage that can be tolerated. Figure 2 illustrates the relationship between semiconductor process geometry reduction and core and I/O withstand voltage, and compares these voltages to the battery's maximum voltage.
Figure 2: The low nano process cannot support power management functions at battery voltage.
Because the PMIC needs to be directly connected to the battery voltage (up to 4.5V for a single-cell lithium battery), it cannot be used with 40nm, 32nm and the quad-core ARM Cortex-A9 application processor that is popular with today's leading manufacturers. 28 nanometer process to manufacture. Therefore, the PMIC function must be separated from the application processor. Today's 3G smartphones exemplify this trend. A typical solution is a separate PMIC that powers the application processor separately, while the next baseband processor has built-in power management.
In some applications, it makes sense to integrate a PMIC with an audio subsystem chip that includes a digital signal processor (DSP), audio codec (CODEC), and functions like a Class D speaker amplifier and a Class G headphone amplifier. of. Dialog Semiconductor's DA9059 is an example of combining PMIC and audio subsystem ICs for mobile applications. It can save bill of materials costs by nearly 43%.
Looking ahead, the 4G architecture will likely use two complex PMICs to support baseband and application processors, respectively.
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