Phase Detecting Characteristics of Phase Sensitive Detectors

Since the frequency of the modulated signal is much lower than the frequency of the carrier signal, the value of the modulated signal changes little during several periods of the carrier signal, which is often regarded as a constant. At this time, the double-side amplitude modulated signal us and the carrier signal uc (or Uc) ) is the same frequency signal; when the modulation signal is positive, us and uc (or Uc) are in phase; when the modulation signal is negative, us and uc (or Uc) are inverted. In order to identify the phase of the modulated signal, a phase sensitive detection circuit is required. In addition to inputting the amplitude modulation signal us to be demodulated, the phase sensitive detection circuit also needs a signal uc (or Uc) of the same frequency as the reference signal. The phase-detection characteristic of the phase sensitive detection circuit is: when the output voltage is positive, it means that the input amplitude modulation signal us is in phase with the reference signal (ie carrier signal) uc (or Uc), and the modulation signal is positive (or negative); When the voltage is negative, it means that the input amplitude modulation signal us is inverted with the reference signal uc (or Uc), and the modulation signal is negative (or positive). The simulation experiments of three phase sensitive detection circuits were carried out by Multisim, and the experimental results were given.

1. Simulation experiment 1.1, scheme one

The additive phase-sensitive detection simulation circuit is shown in Figure 1. The circuit selects the ideal component, the amplitude modulation signal is input through the transformer T1, and the reference signal is input through the transformer T2. The amplitude of the reference signal uc is much larger than the amplitude of the amplitude modulation signal us. The output is a low frequency signal (demodulated signal), which is filtered by a capacitor and output. The simulation circuit operation results are shown in Fig. 2. Fig. 2(a) shows the operation results when us and uc are in phase, and Fig. 2(b) shows the operation results when us and uc are inverted.

Phase Detecting Characteristics of Phase Sensitive Detectors

Figure 1 Additive half-wave phase-sensitive detection simulation circuit

1.2, program two

The switching full-wave phase-sensitive detection simulation circuit is shown in Figure 3. The circuit uses the actual components. Uc is a square wave signal after uc shaping. In the half cycle of Uc=“1”, the analog switch is turned on, and the amplification factor is -1; in the half cycle of Uc=“0”, the analog switch is turned off, and the amplification factor is +1. The waveform of the simulation circuit is shown in Figure 4. In Figure 4(a), us and Uc are in phase; in Figure 4(b), us and Uc are in phase.

Phase Detecting Characteristics of Phase Sensitive Detectors

Fig. 2 Simulation operation result of phase-added phase sensitive detection circuit

Phase Detecting Characteristics of Phase Sensitive Detectors

Figure 3 Switching full-wave phase-sensitive detection simulation circuit

Phase Detecting Characteristics of Phase Sensitive Detectors

Figure 4 Switching full-wave phase-sensitive detection circuit simulation running waveform

1.3, program three

The circuit shown in Figure 5 can identify the lead or lag relationship of the two signals, and the magnitude of the output voltage corresponds to the phase difference between the two signals. A1, A2 are zero-crossing comparators, and the output is limited to two rectangular waves whose phase difference is the same as the phase difference of the input signal. The two rectangular waves are subjected to an exclusive OR gate and a low pass filter circuit to obtain a DC voltage corresponding to the phase difference of the two input signals, and are output through A3. The D flip-flop and the triode form a lead-and-lag identification circuit. When uA leads uB, the flip-flop outputs a high level, the triode is turned on, and the output is negative; when uA lags uB, the flip-flop outputs a low level, the triode is turned off, and the output is positive. The phase shifting circuit is composed of two co-frequency equal-amplitude power sources u1, u2 and R1, C1. The voltage uR on R1, the voltage uC on C1, and the phasor relationship between u1, u2, uA, and uB are shown in Fig. 6. Adjusting resistor R1 can produce a phase difference of 0~180° between uA and uB. φ = 2θ = 2arctgωR1C1. Figure 7 shows the output voltage of the circuit simulation run when R1 takes 1kΩ, and Figure 8 shows the waveforms of each point.

Phase Detecting Characteristics of Phase Sensitive Detectors

Figure 5 Phase sensitive detection simulation circuit

Phase Detecting Characteristics of Phase Sensitive Detectors

Figure 6 phasor diagram

Phase Detecting Characteristics of Phase Sensitive Detectors

Figure 7 Figure 5 circuit simulation running output voltage

Phase Detecting Characteristics of Phase Sensitive Detectors

Figure 8 Phase sensitive detection circuit simulation running waveform

2, the conclusion

EDA technology can not only greatly shorten the design cycle of electronic circuits, improve design efficiency, reduce design risks, improve design quality, but also provide a good platform for electronic experiments. Although the simulation test can not replace the traditional practical experiment, it is convenient, fast, intuitive, image, economical and safe. Better experimental projects can be developed using Multisim or other simulation software.

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