1, when FANOUT wiring?
FANOUT wiring: extension pad type wiring.
In order to ensure the SMD device placement quality, generally follow the principle of not drilling holes in the SMD pad, so use fanout wiring, extend a small part of the wiring from the SMD device pad outward, and then place the VIA, play on the pad The role of the hole. In LAYOUT PLUS, use fanout wiring with AUTO/Fanout/Board. First set the FANOUT parameters. FANOUT must be routed to each SMD device on the PCB prior to autowiring.
2, now there are four modules on the top-level diagram, select any module, right click Descend Hierarchy to enter the sub-graph, now the sub-graph has been drawn, how to automatically generate PORT in the top? Don't add PORT one by one yourself? (Ports have been placed on some pins in the submap)
The PIN pin of the hierarchical circuit diagram should be placed on its own. Use the place pin shortcut menu after selecting the module. Automatically should not be possible.
3, just want to board without any layer, separate output gerber file. The whole thing?
Found that in the layout comes with the template, there are some definitions on the frame and size, are in the notes layer. So you can also set the board type, set the obscrace type to board outline, set the obstracle layer to notes, of course, add the notes layer in the layers dialog box, and then output the notes layer gerber file separately.
4, level diagram, select, right, Descend Hierarchy, error: Unable to descend part.?
It is recommended that you reset the hierarchy and reset the properties.
5. What is the concept of a hierarchical schematic?
Hierarchical circuit is to use the schematic (such as half adder) often used as a module, not only can make the design layout simple, but also easy to refer to other designs
6. Questions about DEVICE generated by ORCAD
When exporting a DEVICE file with ORCAD, it only comes from the PIN connection of the components shown on the default schematic. The PIN of the floating PIN is not counted in the DEVICE PINCOUNT, and the number of component PINs cannot be determined (due to the dangling is not displayed). It is easy to do mistakes when doing packaging, if there is no DATA SHEET.
How can we avoid this problem? How to display all PINs of components in ORCAD?
Is the schematic's feet related to the package's feet? Of course, the package does not look at the schematic. Find DATASHEET build package library
7. How to change the size of "NAME", "NUMBER", and the length of the PIN and the spacing of the GRID in the PIN of ORCAD V9.23?
The length of the pin: select the component, click the right mouse button, edit part, select the right mouse button / edit properTIes/shape. name, number The font size is fixed and cannot be modified.
8, how to add new components in orcad
Method one: After adding components in the schematic, ECO to LAYOUT diagram.
Method 2: Directly in the LAYOUTL diagram with TOOL---"COMPONENT---"NEW function to add components.
9. ERROR: [DRC00031]
Package has the same name but different source library
This is because of what reason?
It is possible that two components use the same component number. (How do I see it: the same package comes from a different source connection library??)
10, why there will be deleted together with the vitality of the pin together?
It may be that you have selected the component and notice that there is no dotted box around the observed component.
11ã€Capture copy element processing issues
My diagram is copied from other *.DSN diagrams. The diagrams of others are only *.DSN and *.opj files. The copy of the above diagram shows that the source library and source packages in the above part cannot be changed.
I read the data of the capture and said
CauTIon: An attached schemaTIc folder or other file external to the project or library is not stored with the project or library. If you copy or move the project or library to a new locaTIon, you must also move or copy the attached object to keep them Together. In addition, you may need to edit the path to the attached schematic folder or file if you move the project to a new location with a different directory structure.
The general idea is that when copying, there are other attachments that should also be copied together, and then modify the path. I would like to ask, like I am in this situation, what should I do? There is still a good way to change one by one from the new input components.
Ps, copy of the original file can not get more information.
No need to change, the schematic diagram to the PCB LAYOUT transfer netlist information is just PART REFERENCE and PCB FOOTPRINT only, you just change the FOOTPRINT NAME on the line, as for SOURCE LIB and SOURCE PACKAGE can not be changed, does not matter (Note: Only your components PCB FOOTPRINT entry is empty, will use SOURCE PACKAGE)
12, what is the quick way to make all the components of the package and the value of the output
Schematic is orcad/capture, plus powerpcb
Use BOM form output to add {PCB FOOTPRINT} to COMBINED PROPERTY STRING items
13, I ask experts, I am drawing circuit diagrams, because this circuit diagram is for others to give me, I want to make changes, but there are some components in the library is not, how do I want to be able to get the desired component faster?
I do not want to copy; it is because this component was built incorrectly. If you say that there are few components in the circuit diagram PIN, how can we add it, hurry, thank you first!
Select components, then right-click the edit part to modify it
14, I ask prawn, orcad how to import powerpcb?
Tools/create netlist/other/padspcb.dll, output file name suffix changed to .asc.
15. Capture DRC appears: Off-Grid Objects
Off-Grid Objects appears in the session log. I read the help file, but I still don't understand what is called Off-Grid Objects.
Reporting Off-Grid Objects
R78 - 08-POWER/LED/JTAG/CLOCK/OM (177.80, 222.50)
C128 - 08-POWER/LED/JTAG/CLOCK/OM (93.98, 49.53)
C129 - 08-POWER/LED/JTAG/CLOCK/OM (106.68, 49.53)
R81 - 08-POWER/LED/JTAG/CLOCK/OM (35.31, 271.78)
F1 - 08-POWER/LED/JTAG/CLOCK/OM (59.18, 38.10)
R75 - 08-POWER/LED/JTAG/CLOCK/OM (152.40, 208.53)
C121 - 07-LCD (137.16, 133.48)
With the snap to grid turned off, the components are not placed on the grid. So statistics will show such hints
Is there a way to correct not off-grid devices?
The solution is to turn this option off during erc
16, CAM output file, why power and ground layer does not seem to see anything, is not all PCB CAM output is like this?
Look to the cross pad
17. Does anyone know how to convert PADS files to ORCAD files? If so, please enlighten me! ~! Thank you
Export the PADS file to ASC format, which should be imported in ORCAD.
18, in the use of CAPTURE when the first draw a component placed on the map, and later issued a first painting of a problem, it went back to the component library to modify it, in the schematic, how can not be a new component Put it on the original one, I think it should be updated! Who can help you look at it?
In the drawing of the schematic on the point of the component, and then right-click pop-up menu, there is an edit part function, go in after you modify it well, after the modification on the update current on the line. Must be changed.
19, I use the Orcad finished schematics, want to use Powpcb draw PCB
The question now is how to add the library of component packaging in Orcad, let Powpcb know what package is used
Are these PCB packages drawn in Orcad or in Powpcb? Especially a new package named by myself
Packages are drawn in POWER PCB. Set the FOOTPRINT of each component in the ORCAD CAPTURE to be the same as the package name in the POWERPCB
For details, see "Using Orcad for Schematics, Using PADS layout"
20, I am ready to use ORCAD for schematics, and then made into alegro's network table, but when I added a component library but found that you can add *.olb and *.lib library, what are the two libraries used in what occasion?
Where can I see the component package library in allegro?
*olb is a graphic symbol library file that is the principle library, *.lib is the simulation model description library file uses Spice language to define and describe the graphic symbols in Capture. *.llb is a PCB package library file.
Use olb that .lib is the DOS version of Capture's library file
21, how can you save the orcad schematic components to the specified component library
Select the component EDIT PARTS and select Save As from the Edit window.
22, how to ask protel map can be converted into orcad can open
It is necessary to export PROTEL as an ASCII file, and then use capture's file------import design. I used it.
23. A device with more pins may only be too large if you only put them in a diagram when drawing a schematic. I want to use two or three parts to draw. How to set it and how to generate them? PCB mapping to the same package
The three parts of the footprint specify a single package; for this issue, read Capture CIS Help - Learn Recovery Lesson Menu - marking part
24, I part of the part is divided into 6 parts U1A ~ U1F, in the editing of each part, right-click --> edit part, there are parts of U1A, and I want to edit the other part of the supposed to do? How can this problem be solved?
Solved, ctrl+N
25. After Capture draws the schematic, what method can be used to quickly fill in the device package information?
method one:
Single page mode: click on the circuit drawing, CtrlA select, menu Edit-Properties, click on the following Parts, you can define the Part package;
Method Two:
Click on the project management window, menu Edit-Broser-Parts, select the Part to be set in the Part listed, (note that you can use Shift and Ctrl to check), click the menu Edit-Properties, in the form that appears Fill in the package information quickly.
26, how to delete the cache part? Thanks!
Can only delete the extra part, click Design Cache in the project management window, and then click the menu Design-Clearup Cache on it.
If you modify the library element, there is an inconsistency between cache and lib. Update is fine.
27, I have 12 circuit diagrams, in the 3rd and 10th have +12V power supply, when I check the DRC why there is a warning? How can the same power supply of different pages be linked together? ?
　 Place power symbol change the name can be the same Ah!
28, I have a few schematics but they are less associated with a general plan, I do not know how to generate hierarchical test circuit diagram from the sub-graph, so that their network related! Thank you!
If you want to create a new plan, you might as well create a block diagram of the principle directly in the original dsn file, make it into make root, not on the line? The mashed potato man above meant to ask if there was a similar command in the capture (like protel, using the create symbol from sheet command directly) to generate a block diagram.
29. I have the ORCAD schematic on hand and I now want to get the library (lib) from this schematic. Can you heroes have this feature in ORCAD? Thank you!
Answer: file-new a library, then copy the design catch part to the library on it.
30, I used Orcad to draw a mobile phone schematic, the netlist also gave PowerPcb and made a PCB board, commissioning and mass production. This means that the electrical characteristics of the schematic are correct! The problem with the BOM is now encountered. The normal item number reference part description PCB Footprint Vendor
No problem, now you need to add a few attributes (such as Manufacturer, Order Number, Part No.). If you edit EDIT on each component, plus the above attributes, it's okay, but one by one, a few hundred. Part, add it! ! I heard that there is a way to import what files, you can add all the above attributes to all Parts, and then I fill in the specific value, a Bom to get it. I do not know that heroes can learn, pointing! !
Solution one: Use CIS, but your company has no law for the time being.
The second solution: Do not put the settings into the schematic, then you can use Key in EXCEL. Many companies only do it.
Solution 3: Using Update propetry, it's a bit complicated and it's time for you to study!
31. I want to add the components of the existing schematic to my own library. After I select a component, I select the edit part by right-clicking it and save it to my own library. However, after saving, the library is found The pin in the schematic is just reversed. The pin on the left goes to the right, and the pin on the right goes to the left. The number of each pin is correct. I don't know why it is. Is it correct?
Answer: You can press V to turn it upside down!
32, I did a good part of the drawings, found that the small map, to enlarge the map, in the "Options" Design Template changed the map settings, the size of the drawings in the SCH did not change?
Are you set up without opening the schematic interface? ! You first open a map, select options - "schematic page propeties, change it here!
33. After a page in the schematic was scattered on other pages, many of the following warnings appeared when exporting the .asc netlist.
No solution.
WARNING: Name contains illegal characters +5V, changed to PLUS5V
WARNING: Name contains illegal characters D+5V, changed to DPLUS5V
WARNING: Name contains illegal characters Version Document , changed to Version_Document
ERROR [NET0011] Netlist failed or may be unusable.
1, +5v connection is wrong, or your +5V did not add power marked, or OFFPAGE, depending on the situation.
2, the error is the same as above.
3, the version number has not changed.
4, the net list can not be produced.
Change these mistakes and you're done.
34, in ORCAD, to use a lot of devices, do not want to use a large map, want to split it into several parts, tried many times will not work, who can give pointers?
After creating a new component, Parts per Pkg selects the number of components to be split, and Package Type selects Heterogeneous.
35, I have been using CONCEPT-HDL and ALLEGRO, SPECCTRAQUEST, now there is a board want to do the principle of simulation and PCB simulation, so the initial plan to use CAPTURE CIS design schematics, simulation into ALLEGRO after doing PCB simulation. I do not know whether the CAPTURE and ALLEGRO interface is convenient to use. What issues need attention?
There are many of my devices in CAPTUE, I do not know how to build a library? Which heroes have good help articles to give, or where to download electronic documents? Please also inform. I would be grateful
There is no problem with the Capture and Allegro interfaces because they are now a family. It should be noted that the pin name of the device cannot be the same except for the power supply. Even NC pins must be defined as NC1 and NC2. . A lot of tutorials online, search should be able to find.
36, I made a small board, there are four male plug, surrounded by four screw holes. Now do a big board, put the small board on the top, the female socket is just facing the male socket, the screw holes should be aligned, I want to put the small board as a component package transferred to the big board, so that the alignment is relatively easy. Ask how to make this small board package? Please master guiding
Answer one: you want to make a package, it should not be, I personally think that should be your list of small parts of the list file, in the right side of allegro Find by name select its function symbol or (pin), in The following box in the keyin your list file, and in the Find by name function should be selected List, it should be OK. There is also your big board must also be transferred to Netin oh
Answer two: When my master makes several board superimpositions, the upper frame and the connector of the small board are made into library components (the board frame is made into the component package, the connector is made into the solder pad), and then transferred to On the large board, if it is placed exactly opposite to the screw hole, it will be deleted, because the size of the board is connected with the cable. This will be very accurate when installed. But he is now gone.
37. When everyone does sch, does capture cis use it? In addition BGA package how to use the letter sequence to mark the tube corner number?
CIS: Component Imformation System, as far as the benefits are concerned, is mainly for a company's library management functions, a simple example: that is, you can see all the information of the part (including the part number) in the place part. , value, component description, price, company inventory, package outline, component datasheet......), for engineers the advantage is to generate BOM one time, do not have to fill in what part number, component description of what information, mainly to reduce The opportunity to make mistakes.
Is it possible to use letter pins instead of direct letters?
38, ORCAD's PART VALUE has any effect, a colleague of mine said that the VALUE of different types of devices can not be the same, because if the same DEVICE generated, there will be problems, for example --- I have a 33 ohm resistor A 33 ohm 4-pin exclusion, in the schematic, the VALUE value can not be written as 33, and can be written as R33,33. What is the reason for this? Which heroes can you explain? Thank you.
If the value of different types of devices is the same, different types of components will be put together when listing the devices. As you mentioned above, it will be considered as two 33 ohm resistors without distinction.
39. In Capture, you can prepare future Aleegro PCB layouts by setting certain properties of Properties. I ask you: What are the attributes? Especially related to networks, such as differential pairs, its name, line width, and line spacing can be set in advance in one of these attributes and then brought to Allegro.
Answer: In the edip property, filter by selection: Cadence-allegro can see what can be changed; as for the differential pair, the line spacing can only be defined by name, the specific need to specify the value in allegro, like min_line_width can directly define how much .
40. Draw the circuit diagram in a capture and make a .olb library file of all the components in the diagram. When you open this library separately, editing the components is normal. However, if you use the Component Manager in Capture, select a component. When you click on the right-click menu, you cannot see the component's graphics (the parameters are there) in the Component Manager window, and prompt: "Coud not read part information Form WAG/CAP†means that the CAP capacitor information cannot be read out.
Where is wrong? How to set up CIS?
Part Manager is the function of CIS, you do not set up CIS so suggest error! 2-> look at the help file, very detailed
41, ask you a heroes a question: ORCAD CAPTURE finished drawing with DRC check, there are two GND errors, one I connected with VSS to solve the GND, there is a way how not. Or incorrect report: too few connector to GND! How to solve?
Because the gnd or vcc you pick up is a contact, there are too few contacts. For example: If one capacitor is vcc and the other is gnd, your current situation will also appear. Do you wonder if this is the case?
42, in the orcad project dsn inside the two pages of the same signal how received together ah?
Can not place a page break, OFF PAGE. Only with the same OFF PAGE name
However, the net I can't connect to in the two pages is not a single line net.
But the bus can't even go together
It seems that page off is not even on the bus.
I do not know what kind of brother you see?
Pay attention to the two page Off Pages drawn as a bus, such as DATA[1..31]
43. The error codes are as follows: Spawning "D:CadencePSD_15.1 oolscapturepstswp.exe" -pst -d "d:oardworkvermont.dsn" -n "D:BOARDWORKAllgero" -c "D:CadencePSD_15.1 oolscaptureallegro.cfg" -v 5 -j "PCB Footprint" Scanning netlist files Loading D:BOARDWORKAllgero/pstchip.dat Loading D:BOARDWORKAllgero/pstchip.dat Loading D:BOARDWORKAllgero/pstxprt.dat Loading D:BOARDWORKAllgero/pstxnet.dat Error: Line 914 in file D:BOARDWORKAllgero /pstxnet.dat: Reference designators inconsistent in xprt and xnet files Detected in function: pstFindInstByOldPathName Error: Line 914 in file D:BOARDWORKAllgero/pstxnet.dat: Error loading the net list file Detected in function: ddbLoadPstXFiles #1 Error [ALG0036] Unable To read logical netlist data.
Exiting "D:CadencePSD_15.1 oolscapturepstswp.exe" -pst -d "d:oardworkvermont.dsn" -n "D:BOARDWORKAllgero" -c "D:CadencePSD_15.1 oolscaptureallegro.cfg" -v 5 -j "PCB Footprint"
*** Done ***
Lines 912-913 of pstxnet.dat are:
NODE_NAME R372 2 ''''''''''''''''@VERMONT.TOP(SCH_1): PROTOCARD (SCH_1):ISTOR.NORMAL(CHIPS)''''''''''''' '''': ''''''''''''''''2'''''''''''''''':;
Allegro can import the list, but rats are not connected to ground
How to solve this problem?
The solution to this problem is to delete the device that is reporting the error and then copy the same device. But every time Netlist only reported one mistake, it was a bit depressing
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